The mission of Accellera Systems Initiative is to deliver standards that lower the cost of designing commercial IC and EDA products and embedded system solutions, as well as increase the productivity of designers worldwide. The Technical Committee is where this mission is realized, and through its dedicated work, EDA and IP standard are developed that enable and promote technology innovation.
The Board of Directors of Accellera Systems Initiative established the Technical Committee (TC) to develop, update and extend hardware design language (HDL) and intellectual property (IP) standards. The TC is comprised of working groups that focus on the various standards under development, and report to the TC Chair. In addition, Accellera supports activities of certain IEEE working groups and cooperates with other standards groups within the EDA industry.
Membership at the Corporate or Associate level is required to join a Working Group or have a vote on specifications and standards. Learn more about the different levels of membership.
Working Group Status and Chairs
|IP-XACT||Erwin DeKock, NXP||Active|
|Multi-Language (ML)||Warren Stapleton, AMD||Active|
|Open Core Protocol (OCP)||Dormant|
|Open Verification Library (OVL)||Dormant|
|Portable Stimulus||Faris Khundakjie, Intel||Active|
|SystemC Analog/Mixed-Signal (AMS)||Martin Barnasconi, NXP||Active|
|SystemC Configuration, Control and Inspection (CCI)||Trevor Weiman, Intel||Active|
|SystemC Language||Philipp Hartmann, Intel||Active|
|SystemC Datatypes||Frederic Doucet, Qualcomm||Active|
|SystemC Synthesis||Andres Takach, Mentor, a Siemens Business||Active|
|SystemC Transaction-level Modeling (TLM)||Bart Vanthournout, Synopsys||Active|
|SystemC Verification||Stephan Gerth, Fraunhofer||Active|
|SystemVerilog-AMS (Analog Mixed-Signal)||Scott Little, Mentor, a Siemens Business||Active|
|Unified Coverage Interoperability Standard (UCIS)||Dormant|
|Universal Verification Methodology (UVM)||Justin Refice, NVIDIA||Active|